It has been five years since the purchase of Altera by Intel, whose technology has been efficiently integrated into the catalog of the company founded by Gordon Moore. What has historically been Altera’s competitor, Xilinx , is about to be acquired by AMD in what may turn out to be one of the most important acquisitions in the industry in recent years. What are the causes and consequences? How is it going to affect the average PC user? What is AMD’s interest in acquiring Xilinx?
There are markets where we find that direct competition from AMD , Intel in processors and NVIDIA in graphics cards, has a much larger presence than those in red and it is at this point where the Xilinx technological catalog contributes much to the company led by Lisa Su, since it will allow them to reach markets that they could not reach before, with solutions that they could not implement before.
And what can Xilinx bring to AMD? Well, a formidable presence and cutting-edge technology in 5G, networks, smart cars and especially in terms of communications , markets in which AMD does not have a presence due to the fact that the development of its technologies has not gone in that sense, but the thing is a lot deeper and requires detailed analysis.
FPGAs come to AMD from Xilinx
It must be taken into account that Xilinx is a company specialized in the development of FPGAs, although apart from that they also license hardware description code such as IPs to load in their FPGAs and that have specific functions within different areas.
We can compare this purchase with the one that AMD made in its day from ATI Technologies; The idea of implementing Xilinx technology in AMD processors was dropped by Lisa Su very sibylistically at CES 2019, where one of the slides featured the concept of “FPGA Accelerators.” Since then we have not heard anything from the mere fact that AMD does not have a division of FPGAs that allows it to develop them.
First of all, we have to understand what the concept of an accelerator is: they are co-processors that are dedicated to doing specific tasks within a processor, but they do them using an area of the chip much smaller than a complete processor and with a consumption very small.
An example of this type of accelerator can be a video decoder built into a SoC or a GPU; The problem with this decoder is that if a new type of video format appears, we cannot change its circuitry so that it can reproduce it, but with an FPGA, in exchange for these being a bit more complex in size, they can be reconfigured. to support new standards or improve your efficiency.
The other advantage is that it allows us to completely reorganize the purpose within the different accelerators. Imagine that we have a display controller implemented via FPGA in the SoC, but we are only going to use a monitor or there are interfaces that we are not going to use. Well, at the user level, we can make the screen controller load a simpler IP and the logic gates of the FPGA part or parts can be used for other tasks that make much more sense for the needs of each client.
The influence of FPGAs in the face of artificial intelligence
If we made a classification on which designs are the most suitable for artificial intelligence algorithms, the conclusion would be that those of the MIMD type, multiple instructions and multiple data, are the ones that have an advantage over the rest of the architectures.
Since CPUs are scalar and generally have a bit of SIMD, and GPUs are mostly SIMD and have little to scale, it has been necessary to create cores with MIMD execution ALUs in order to implement intelligence algorithms. artificial. It is precisely at this point where FPGAs come in since they can be configured to function as multiple different cores operating in parallel, and this has made many AI implementations not based on highly specialized ASICs or chips but on implementing FPGAs such as neural networks or systolic arrays.
This is a market that AMD cannot access at the moment because the cores in which they have specialized all this time are not prepared to meet those needs, but with the acquisition of Xilinx it could have access to it and solve one of AMD’s pending tasks for its expansion. We may see a new family of AMD processors based on chiplets, but where one or more of the chiplets is an FPGA. This will allow AMD to compete head-to-head against Intel in those markets, but the reason why AMD would have made the Xilinx purchase offer also has to do with how the chips of the future will be designed.
But this would not be the only reason and it is that currently there is a deficiency in AMD that makes the acquisition of Xilinx very important for them.
The second reason for AMD’s interest in Xilinx: The advent of NoCs
The concept of NoC is something you are going to hear and read a lot in the years to come. NoC stands for Network on a Chip as it stands for Network on a Chip. The idea is to bring the concept of local networks to processors and stop using interconnection matrices to communicate the different elements within a SoC or an MCM.
The idea is very simple: each independent element of the architecture is fitted with a transceiver or router … think of it as if we were fitting a network adapter to each one. Instead of having a central matrix in which all the elements are interconnected, what we have is that each element of the system has its transceiver, which only has to “dial the number” of another element of the infrastructure to communicate with it. .
And this is not something that AMD is going to bring exclusively, it is a trend that all processor designers including Intel and NVIDIA are going to integrate. An example of NoC was shown to us by NVIDIA with the experimental RC-18 chip.
The GRS in the NVIDIA RC-18 are nothing more than transceivers that communicate each of the small chiplets with the neighboring chiplets, but what interests us in all this is what AMD could implement and that is that there is a potential 2.5DIC configuration based on implementing the communication interface in the Interposer. To simplify things, each of the processors and accelerators would be communicated through the Interposer, which would be a NoC and would be vertically connected to it.
The part of the current AMD CPUs and SoCs that will move to Interposer and will become a NoC is the north bridge, known as the Scalable Data Fabric or SDF, which will no longer be the classic interconnection matrix .
But in all of this, where does an FPGA come into play? Well, in every network we need an integrated network controller known as a NIC, and it is at this point where the implementation of an FPGA makes all the sense, to be able to implement what is traditionally known as a SmartNIC.
The “smart” integrated network controller
The reason why AMD may be interested in Xilinx is for the implementation of what we call a SmartNIC, a type of unit that with the arrival of NoC is becoming one of the most important elements for the design of new architectures based on this paradigm.
The network cards have been with us since the first PC, they are called NIC in English since they are the acronym for “Network Interface Card” and we will soon realize that the routers that we have mentioned in the previous section are precisely NICs . But can’t we just make them a little more complex? After all, just sending packages is not entirely efficient.
The idea would be to implement the SmartNIC in an FPGA, which allows us to integrate a network controller with extras such as an accelerator in charge of compressing and decompressing the data sent from one processor to another on the fly, or from memory to a processor . But we can also integrate a processor in charge of managing package delivery without the central CPU or another type of processor having to take part in the data logistics process, so the idea is none other than to implement accelerators in the routers of each of the elements that are part of the NoC.
It is with the advent of NoCs, the interest of the industry in adopting them in future products including AMD and the communications portfolio that Xilinx has when we see the whole puzzle and we can see the meaning of AMD’s interest in buying Xilinx, and not only in order to implement accelerators via FPGA, but also in the face of the artificial intelligence market and for the development of SmartNICs for the NoCs around which future designs will revolve, which in a short time will no longer seem so future.